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Optimal User Weighting Fusion in DWT Domain On-line Signature Verification
https://repository.lib.tottori-u.ac.jp/records/7021
https://repository.lib.tottori-u.ac.jp/records/70218f75aa9d-5d17-4da4-8ee9-8f31d0eea071
| 名前 / ファイル | ライセンス | アクション |
|---|---|---|
ISCAS2005_1698.pdf (247.3 kB)
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| Item type | 会議発表論文 / Conference Paper(1) | |||||||||||
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| 公開日 | 2018-06-22 | |||||||||||
| タイトル | ||||||||||||
| タイトル | Optimal User Weighting Fusion in DWT Domain On-line Signature Verification | |||||||||||
| 言語 | en | |||||||||||
| 言語 | ||||||||||||
| 言語 | eng | |||||||||||
| 資源タイプ | ||||||||||||
| 資源タイプ | conference paper | |||||||||||
| 著者 |
Nakanishi, Isao
× Nakanishi, Isao
WEKO
2512
× Sakamoto, Hiroyuki× Itoh, Yoshio× Fukui, Yutaka× Sakamoto, Hiroyuki |
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| 著者所属 | ||||||||||||
| 値 | Faculty of Regional Sciences, Tottori University | |||||||||||
| 著者所属 | ||||||||||||
| 値 | Faculty of Engineering, Tottori University | |||||||||||
| 著者所属 | ||||||||||||
| 値 | Faculty of Engineering, Tottori University | |||||||||||
| 著者所属 | ||||||||||||
| 値 | Faculty of Engineering, Tottori University | |||||||||||
| 抄録 | ||||||||||||
| 内容記述タイプ | Other | |||||||||||
| 内容記述 | The on-line signature verification method in DWT domain has been proposed. Time-varying pen-position signal of the on-line signature is decomposed into sub-band signals by using the DWT. Individual features are extracted as high frequency signals in sub-band. By using the extracted feature, verification is achieved at each sub-band and then total decision is done by combining such verification results. In this paper, we introduce a user weighting fusion into the total decision. Through verification experiments, it is confirmed that there is an optimal weight combination for each user and verifiaction rate can be improved when the optimal weight combination is applied. | |||||||||||
| 書誌情報 |
IEEE International Symposium on Circuits and Systems proceedings 2005 (ISCAS2005) en : IEEE International Symposium on Circuits and Systems proceedings 2005 (ISCAS2005) p. 1698-1701, 発行日 2005 |
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| 出版者 | ||||||||||||
| 出版者 | IEEE | |||||||||||
| ISSN | ||||||||||||
| 収録物識別子タイプ | ISSN | |||||||||||
| 収録物識別子 | 02714302 | |||||||||||
| 書誌レコードID | ||||||||||||
| 収録物識別子タイプ | NCID | |||||||||||
| 収録物識別子 | AA10453415 | |||||||||||
| DOI | ||||||||||||
| 関連タイプ | isVersionOf | |||||||||||
| 識別子タイプ | DOI | |||||||||||
| 関連識別子 | 10.1109/ISCAS.2005.1464933 | |||||||||||
| 権利 | ||||||||||||
| 権利情報 | © 2005 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new coll | |||||||||||
| 情報源 | ||||||||||||
| 関連名称 | IEEE International Symposium on Circuits and Systems proceedings 2005 (ISCAS2005). 2005, 1698-1701 | |||||||||||
| 関連サイト | ||||||||||||
| 識別子タイプ | URI | |||||||||||
| 関連識別子 | https://ieeexplore.ieee.org/document/1464933/ | |||||||||||
| 関連名称 | https://ieeexplore.ieee.org/document/1464933/ | |||||||||||
| 著者版フラグ | ||||||||||||
| 出版タイプ | AM | |||||||||||
